The present invention relates to the re-phasing of a repetitive clock signal from a selected signal characteristic of a second incoming signal. More particularly, an asynchronous clock signal is re-phased to occur substantial with the leading edge of a horizontal sync signal that was extracted from a received video signal. The purpose of this is to prevent jitter, tearing, or other interferences when a frame of video is captured and frozen for input to a computer.
Given raster scanned video, regardless of the source of the video or its characteristics (e.g. VGA, EGA, CGA, TV, extended EGA, etc.), one must be able to repeatably position the pixels from line to line so that the pixels that make up the image provide a clear image. Each of the various raster scanning standards have different scanning and pixel rates, and different resolutions even within the same scanning rate. So not only is the horizontal sync frequency a variable, the number of pixel clock pulses between any two horizontal sync pulses is a second variable. Thus, in the ideal clock generator, all of those variables have to be programmable parameters.
If repeatability from line to line is not present the offset from line to line can be quite noticeable, even if there is only a variation of one pixel position from line to line because the pixels in adjacent lines do not line up. The goal in these applications is to get a totally repeatable clock signal to within a fraction of a pixel.
In the prior art, a phase-lock loop is driven by the horizontal sync pulse of the frame of interest. In the phase lock loop, every time the horizontal pulse occurs, a phase correction is made so that finally, given enough samples, the phase settles down and a clean signal results. That approach works well as long as the horizontal sync pulses continue to occur. However, with a VCR on pause there may not be any horizontal sync pulses between frames. So when a phase lock loop is used in such an environment there may be ten or twenty lines before another horizontal sync pulse occurs which may not be in sync with the previous such pulse that the phase lock loop previously locked onto. That results in a "tearing" at the top of the picture at the beginning of the image frame. In the ideal situation one would like to grab a freeze frame with the lines instantaneously synchronized one to the other.
In other prior art circuits, phase lock loops are used to lock onto the color burst signal that follows the horizontal sync pulse. The color burst signal presents more edges for the phase lock loop to act on which can result in the phase lock loop locking onto the signal with fewer lines of video. This has an inherent problem in that it will not work in a monochrome environment. The color burst signal is also not as desirable a signal to lock onto since it is often intermittent.
What is desired is to be instantaneously phased upon every line so that you don't have video tearing caused by missing sync pulses or suddenly changing sync pulse locations. What is needed is a flash synchronizer to instantly determine the phase adjustment necessary and to immediately generate a clock signal that overcomes the shortcomings of the prior art methods. The present invention provides such a device.